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Verified Commit 7f5003b4 authored by Simon Josef Thür's avatar Simon Josef Thür
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\section{MOS structure}
IDKF, lecture hasnt been given yet
\ No newline at end of file
\section{MOS-FET}
\subsection{Capacitance}
\begin{center}
\begin{circuitikz}
\draw (0,0) node[above] (Vg){$V_{G}$}
to [C,l=$C_{ox}$,o-*] ++(0,-1) node[right] (vpsi){$\psi_s$}
to [C,l=$C_{s}$] ++(0,-1) node[ground](gnd){}
;
\end{circuitikz}
\end{center}
\begin{align}
\frac{1}{C_G} & = \frac{1}{C_{ox}}+\frac{1}{C_{s}} \\
C_s & = \frac{\mathrm{d}\,-Q_s}{\mathrm{d}\,\psi_s}
\end{align}
\ No newline at end of file
...@@ -47,4 +47,6 @@ ...@@ -47,4 +47,6 @@
\include{07_diode_applications} \include{07_diode_applications}
\include{08_bjt} \include{08_bjt}
\include{09_bjt_small_signal} \include{09_bjt_small_signal}
\include{10_mos}
\include{11_mos_devices}
\end{document} \end{document}
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